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MRF5S9100NR1 mrf5s9100nbr1 mrf5s9100mr1 mrf5s9100mbr1 1 rf device data freescale semiconductor rf power field effect transistors n - channel enhancement - mode lateral mosfets designed for broadband commercial and industrial applications with frequencies up to 1000 mhz. the high gain and broadband performance of these devices make them ideal for large - signal, common - source amplifier applications in 26 volt base station equipment. ? typical single - carrier n - cdma performance @ 880 mhz, v dd = 26 volts, i dq = 950 ma, p out = 20 watts avg., is - 95 cdma (pilot, sync, paging, traffic codes 8 through 13) channel bandwidth = 1.2288 mhz. par = 9.8 db @ 0.01% probability on ccdf. power gain ? 19.5 db drain efficiency ? 28% acpr @ 750 khz offset ? - 46.8 dbc @ 30 khz bandwidth ? capable of handling 10:1 vswr, @ 26 vdc, 880 mhz, 100 watts cw output power ? characterized with series equivalent large - signal impedance parameters ? internally matched for ease of use ? qualified up to a maximum of 32 v dd operation ? integrated esd protection ? n suffix indicates lead - free terminations ? 200 c capable plastic package ? in tape and reel. r1 suffix = 500 units per 44 mm, 13 inch reel. table 1. maximum ratings rating symbol value unit drain- source voltage v dss - 0.5, +68 vdc gate - source voltage v gs - 0.5, + 15 vdc total device dissipation @ t c = 25 c derate above 25 c p d 336 1.92 w w/ c storage temperature range t stg - 65 to +150 c operating junction temperature t j 200 c table 2. thermal characteristics characteristic symbol value (1,2) unit thermal resistance, junction to case case temperature 80 c, 20 w cw r jc 0.52 c/w 1. mttf calculator available at http://www.freescale.com/rf . select tools/software/application software/calculators to access the mttf calculators by product. 2. refer to an1955, thermal measurement methodology of rf power amplifiers. go to http://www.freescale.com/rf . select documentation/application notes - an1955. note - caution - mos devices are susceptible to damage from electrostatic charge. reasonable precautions in handling and packaging mos devices should be observed. document number: mrf5s9100 rev. 3, 7/2005 freescale semiconductor technical data 880 mhz, 20 w avg., 26 v single n - cdma lateral n - channel rf power mosfets MRF5S9100NR1 mrf5s9100nbr1 mrf5s9100mr1 mrf5s9100mbr1 case 1486 - 03, style 1 to-270 wb-4 plastic MRF5S9100NR1(mr1) case 1484 - 02, style 1 to - 272 wb - 4 plastic mrf5s9100nbr1(mbr1) ? freescale semiconductor, inc., 2005. all rights reserved.
2 rf device data freescale semiconductor MRF5S9100NR1 mrf5s9100nbr1 mrf5s9100mr1 mrf5s9100mbr1 table 3. esd protection characteristics test conditions class human body model (per jesd22 - a114) 1c (minimum) machine model (per eia/jesd22 - a115) a (minimum) charge device model (per jesd22 - c101) iv (minimum) table 4. moisture sensitivity level test methodology rating package peak temperature unit per jesd 22 - a113, ipc/jedec j - std - 020 3 260 c table 5. electrical characteristics (t c = 25 c unless otherwise noted) characteristic symbol min typ max unit off characteristics zero gate voltage drain leakage current (v ds = 68 vdc, v gs = 0 vdc) i dss ? ? 10 adc zero gate voltage drain leakage current (v ds = 26 vdc, v gs = 0 vdc) i dss ? ? 1 adc gate - source leakage current (v gs = 5 vdc, v ds = 0 vdc) i gss ? ? 1 adc on characteristics gate threshold voltage (v ds = 10 vdc, i d = 400 a) v gs(th) 2 2.8 3.5 vdc gate quiescent voltage (v ds = 26 vdc, i d = 950 madc) v gs(q) ? 3.7 ? vdc drain- source on - voltage (v gs = 10 vdc, i d = 2.0 adc) v ds(on) ? 0.21 0.3 vdc forward transconductance (v ds = 10 vdc, i d = 6 adc) g fs ? 7 ? s dynamic characteristics (1) output capacitance (v ds = 26 vdc 30 mv(rms)ac @ 1 mhz, v gs = 0 vdc) c oss ? 70 ? pf reverse transfer capacitance (v ds = 26 vdc 30 mv(rms)ac @ 1 mhz, v gs = 0 vdc) c rss ? 2.2 ? pf functional tests (in freescale test fixture, 50 ohm system) v dd = 26 vdc, i dq = 950 ma, p out = 20 w avg. n - cdma, f = 880 mhz, single- carrier n - cdma, 1.2288 mhz channel bandwidth carrier. acpr measured in 30 khz bandwidth @ 750 khz offset. par = 9.8 db @ 0.01% probability on ccdf power gain g ps 18 19.5 ? db drain efficiency d 26 28 ? % adjacent channel power ratio acpr ? - 46.8 -45 dbc input return loss irl ? -19 -9 db 1. part is internally input matched.
MRF5S9100NR1 mrf5s9100nbr1 mrf5s9100mr1 mrf5s9100mbr1 3 rf device data freescale semiconductor z1, z15 0.200 x 0.080 microstrip z2 0.105 x 0.080 microstrip z3 0.954 x 0.080 microstrip z4 0.115 x 0.220 microstrip z5 0.375 x 0.220 microstrip z6, z11 0.200 x 0.220 x 0.620 taper z7 0.152 x 0.620 microstrip z8 0.163 x 0.620 microstrip z9 0.238 x 0.620 microstrip z10 0.077 x 0.620 microstrip z12 0.381 x 0.220 microstrip z13 0.114 x 0.220 microstrip z14 1.052 x 0.080 microstrip pcb arlon gx0300, 0.030 , r = 2.55 figure 1. MRF5S9100NR1(nbr1)/mr1(mbr1) test circuit schematic rf input rf output c1 v supply z15 v bias z6 z13 c12 c4 z12 c8 c6 c7 z8 dut z5 c5 c10 c9 z14 z4 z7 l1 z1 z2 c3 c2 z3 c22 c21 + + l2 c18 c19 c20 + c13 c14 ++ c17 c16 c15 + z10 c11 z9 b1 z11 table 6. MRF5S9100NR1(nbr1)/mr1(mbr1) test circuit component designations and values part description part number manufacturer b1 ferrite bead, surface mount 2743019447 fair- rite c1, c12, c18 18 pf chip capacitors 100b180jp 500x atc c2 0.6- 4.5 pf variable capacitor, gigatrim 27271sl johanson dielectrics c3, c11 0.8- 8.0 pf variable capacitors, gigatrim 27291sl johanson dielectrics c4 6.2 pf chip capacitor 100b6r2jp 500x atc c5, c6 12 pf chip capacitors 100b120jp 500x atc c7, c8 11 pf chip capacitors 100b110jp 500x atc c9, c10 5.1 pf chip capacitors 100b5r1jp 500x atc c13 470 f, 63 v electrolytic capacitor naczf471m63v nippon c14, c15 22 f, 50 v tantalum capacitors t491x226k035as kemet c16, c17, c19 0.56 f, 50 v chip capacitors c1825c564j5gac kemet c20, c21 47 f, 16 v tantalum capacitors t491d4t6k016as kemet c22 100 f, 50 v electrolytic capacitor 515d107m050bb6a multicomp l1 7.15 nh inductor 1606- 7 coilcraft l2 22 nh inductor b07t- 5 coilcraft
4 rf device data freescale semiconductor MRF5S9100NR1 mrf5s9100nbr1 mrf5s9100mr1 mrf5s9100mbr1 figure 2. MRF5S9100NR1(nbr1)/mr1(mbr1) test circuit component layout wb2 wb1 v gg v dd c15 c14 c13 c12 c10 c9 c7 c11 c5 c3 c2 c1 c4 l1 l2 c17 c8 c6 c18 b1 c16 c19 c21 c20 c22 cut out area mrf9100m rev 2 freescale has begun the transition of marking printed ci rcuit boards (pcbs) with the freescale semiconductor signature/logo. pcbs may have either motorola or freescale markings during the transition period. these changes will have no impact on form, fit or function of the current product.
MRF5S9100NR1 mrf5s9100nbr1 mrf5s9100mr1 mrf5s9100mbr1 5 rf device data freescale semiconductor typical characteristics d 920 6 22 830 ?70 50 irl g ps acpr alt f, frequency (mhz) figure 3. is - 95 broadband performance @ p out = 20 watts avg. g ps , power gain (db) v dd = 26 vdc, p out = 20 w (avg.), i dq = 950 ma n?cdma is?95 (pilot, sync, paging, traffic codes 8 through 13) ?30 ?10 ?20 ?15 input return loss (db) irl, efficiency (%) acpr (dbc), alt (dbc) ?25 , drain d 20 40 18 30 16 20 14 ?30 12 ?40 10 ?50 8?60 840 850 860 870 880 890 900 910 d 920 6 22 830 ?80 10 irl g ps acpr alt f, frequency (mhz) figure 4. is - 95 broadband performance @ p out = 2 watts avg. g ps , power gain (db) v dd = 26 vdc, p out = 2 w (avg.), i dq = 950 ma n?cdma is?95 (pilot, sync, paging, traffic codes 8 through 13) ?30 ?10 ?20 ?15 input return loss (db) irl, efficiency (%) acpr (dbc), alt (dbc) ?25 , drain d 20 8 18 6 16 4 14 ?40 12 ?50 10 ?60 8?70 840 850 860 870 880 890 900 910 1000 16 21 0.1 i dq = 1425 ma 1150 ma p out , output power (watts) pep figure 5. two - tone power gain versus output power g ps , power gain (db) v dd = 26 vdc, f1 = 880 mhz, f2 = 880.1 mhz two?tone measurements, 100 khz tone spacing 475 ma 700 ma 950 ma 20 19 18 17 1 10 100 1000 ?70 ?20 0.1 i dq = 475 ma 1425 ma p out , output power (watts) pep figure 6. third order intermodulation distortion versus output power v dd = 26 vdc, f1 = 880 mhz, f2 = 880.1 mhz two?tone measurements, 100 khz tone spacing 950 ma 700 ma 1150 ma ?25 ?30 ?35 ?40 ?45 ?50 ?55 ?60 ?65 1 10 100 imd, third order intermodulation distortion (dbc)
6 rf device data freescale semiconductor MRF5S9100NR1 mrf5s9100nbr1 mrf5s9100mr1 mrf5s9100mbr1 typical characteristics 100 ?70 0 0.1 7th order two?tone spacing (mhz) figure 7. intermodulation distortion products versus tone spacing intermodulation distortion (dbc) imd, v dd = 26 vdc, p out = 96 w (pep), i dq = 950 ma two?tone measurements, center frequency = 880 mhz 5th order 3rd order 110 ?10 ?20 ?30 ?40 ?50 ?60 38 48 58 28 p in , input power (dbm) figure 8. pulse cw output power versus input power 57 56 55 54 53 52 51 50 49 29 30 31 32 33 34 35 36 37 , drain efficiency (%) d d 100 0 50 1 ?80 ?30 g ps acpr alt1 p out , output power (watts) avg. figure 9. single - carrier n - cdma acpr, power gain, efficiency and alt1 versus output power v dd = 26 vdc, i dq = 950 ma, f = 880 mhz n?cdma is?95 (pilot, sync, paging, traffic codes 8 through 13) g ps , power gain (db) acpr, adjacent channel power ratio (dbc) alt1, channel power (dbm) 45 ?35 40 ?40 35 ?45 30 ?50 25 ?55 20 ?60 15 ?65 10 ?70 5?75 10 ideal p3db = 51.58 dbm (143 w) v dd = 26 vdc, i dq = 950 ma pulsed cw, 8 sec(on), 1 msec(off) center frequency = 880 mhz actual p1db = 50.71 dbm (117 w) 180 17 20 0 v dd = 12 v p out , output power (watts) cw figure 10. power gain versus output power g ps , power gain (db) i dq = 950 ma f = 880 mhz 16 v 20 v 24 v 32 v 19.5 19 18.5 18 17.5 30 60 90 120 150 220 10 10 80 t j , junction temperature ( c) this above graph displays calculated mttf in hours x ampere 2 drain current. life tests at elevated temperatures have correlated to better than 10% of the theoretical prediction for metal failure. divide mttf factor by i d 2 for mttf in a particular application. 100 120 140 160 180 10 9 10 7 10 8 figure 11. mttf factor versus junction temperature mttf factor (hours x amps 2 ) 200 p out , output power (dbm)
MRF5S9100NR1 mrf5s9100nbr1 mrf5s9100mr1 mrf5s9100mbr1 7 rf device data freescale semiconductor figure 12. series equivalent source and load impedance f mhz z source ? z load ? 865 880 3.0 - j1.8 2.7 - j1.7 2.8 - j1.9 1.4 - j0.7 1.5 - j0.6 1.5 - j0.5 v dd = 26 vdc, i dq = 950 ma, p out = 20 w avg. z o = 5 ? f = 895 mhz f = 895 mhz f = 865 mhz f = 865 mhz 895 z load z source z source = test circuit impedance as measured from gate to ground. z load = test circuit impedance as measured from drain to ground. z source z load input matching network device under test output matching network
8 rf device data freescale semiconductor MRF5S9100NR1 mrf5s9100nbr1 mrf5s9100mr1 mrf5s9100mbr1 notes
MRF5S9100NR1 mrf5s9100nbr1 mrf5s9100mr1 mrf5s9100mbr1 9 rf device data freescale semiconductor notes
10 rf device data freescale semiconductor MRF5S9100NR1 mrf5s9100nbr1 mrf5s9100mr1 mrf5s9100mbr1 package dimensions to - 270 wb - 4 plastic MRF5S9100NR1(mr1) case 1486 - 03 issue c datum plane bottom view a1 2x d1 e3 e1 d3 e4 a2 pin 5 note 8 a b c h drain lead d a m aaa c 4x b1 2x d2 notes: 1. controlling dimension: inch. 2. interpret dimensions and tolerances per asme y14.5m?1994. 3. datum plane ?h? is located at the top of lead and is coincident with the lead where the lead exits the plastic body at the top of the parting line. 4. dimensions ? d" and ? e1" do not include mold protrusion. allowable protrusion is .006 per side. dimensions ? d" and ? e1" do include mold mismatch and are deter? mined at datum plane ?h?. 5. dimension ? b1" does not include dambar protrusion. allowable dambar protrusion shall be .005 total in excess of the ? b1" dimension at maximum material condition. 6. datums ?a? and ?b? to be determined at datum plane ?h?. 7. dimension a2 applies within zone ? j" only. 8. hatching represents the exposed area of the heat slug. c1 f zone j e2 2x a dim a min max min max millimeters .100 .104 2.54 2.64 inches a1 .039 .043 0.99 1.09 a2 .040 .042 1.02 1.07 d .712 .720 18.08 18.29 d1 .688 .692 17.48 17.58 d2 .011 .019 0.28 0.48 d3 .600 ? ? ? 15.24 ? ? ? e .551 .559 14 14.2 e1 .353 .357 8.97 9.07 e2 .132 .140 3.35 3.56 e3 .124 .132 3.15 3.35 e4 .270 ? ? ? 6.86 ? ? ? f b1 .164 .170 4.17 4.32 c1 .007 .011 0.18 0.28 e .025 bsc .106 bsc 0.64 bsc 2.69 bsc 1 style 1: pin 1. drain 2. drain 3. gate 4. gate 5. source aaa .004 0.10 gate lead 4x e 2x e seating plane 4 2 3 ?????? ?????? ?????? ?????? ?????? ?????? ?????? ?????? ?????? ?????? ?????? ?????? ?????? e5 .346 .350 8.79 8.89
MRF5S9100NR1 mrf5s9100nbr1 mrf5s9100mr1 mrf5s9100mbr1 11 rf device data freescale semiconductor to - 272 wb - 4 plastic mrf5s9100nbr1(mbr1) notes: 1. controlling dimension: inch. 2. interpret dimensions and tolerances per asme y14.5m?1994. 3. datum plane ?h? is located at top of lead and is coincident with the lead where the lead exits the plastic body at the top of the parting line. 4. dimensions "d" and "e1" do not include mold protrusion. allowable protrusion is .006 per side. dimensions "d" and "e1" do include mold mismatch and are determined at datum plane ?h?. 5. dimension "b1" does not include dambar protrusion. allowable dambar protrusion shall be .005 total in excess of the "b1" dimension at maximum material condition. 6. datums ?a? and ?b? to be determined at datum plane ?h?. 7. dimension a2 applies within zone "j" only. 8. hatching represents the exposed area of the heat slug. datum plane y y dim a min max min max millimeters .100 .104 2.54 2.64 inches d2 .600 ? ? ? 15.24 ? ? ? e2 .270 ? ? ? 6.86 ? ? ? d .928 .932 23.57 23.67 d1 e .551 .559 14 14.2 e1 .353 .357 8.97 9.07 b1 .164 .170 4.17 4.32 c1 .007 .011 .18 .28 e r1 .063 .068 1.60 1.73 aaa .106 bsc .004 2.69 bsc .10 b a e1 d 4x b1 d1 e gate lead m aaa ca m aaa ca d2 e2 view y - y 4x e a1 .039 .043 0.99 1.09 f a2 .040 .042 1.02 1.07 .025 bsc 0.64 bsc a1 c h c1 a zone j seating plane .810 bsc 20.57 bsc pin 5 2x r1 b drain lead f a2 7 note 8 1 2 3 4 style 1: pin 1. drain 2. drain 3. gate 4. gate 5. source e3 e3 e3 .346 .350 8.79 8.89
12 rf device data freescale semiconductor MRF5S9100NR1 mrf5s9100nbr1 mrf5s9100mr1 mrf5s9100mbr1 information in this document is provided solely to enable system and software implementers to use freescale semiconductor products. there are no express or implied copyright licenses granted hereunder to design or fabricate any integrated circuits or integrated circuits based on the information in this document. freescale semiconductor reserves the right to make changes without further notice to any products herein. freescale semiconductor makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does freescale semiconductor assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation consequential or incidental damages. ?typical? parameters that may be provided in freescale semiconductor data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. all operating parameters, including ?typicals?, must be validated for each customer application by customer?s technical experts. freescale semiconductor does not convey any license under its patent rights nor the rights of others. freescale semiconductor products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the freescale semiconductor product could create a situation where personal injury or death may occur. should buyer purchase or use freescale semiconductor products for any such unintended or unauthorized application, buyer shall indemnify and hold freescale semiconductor and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that freescale semiconductor was negligent regarding the design or manufacture of the part. freescale and the freescale logo are trademarks of freescale semiconductor, inc. all other product or service names are the property of their respective owners. ? freescale semiconductor, inc. 2005. all rights reserved. how to reach us: home page: www.freescale.com e - mail: support@freescale.com usa/europe or locations not listed: freescale semiconductor technical information center, ch370 1300 n. alma school road chandler, arizona 85224 +1 - 800- 521- 6274 or +1 - 480- 768- 2130 support@freescale.com europe, middle east, and africa: freescale halbleiter deutschland gmbh technical information center schatzbogen 7 81829 muenchen, germany +44 1296 380 456 (english) +46 8 52200080 (english) +49 89 92103 559 (german) +33 1 69 35 48 48 (french) support@freescale.com japan: freescale semiconductor japan ltd. headquarters arco tower 15f 1 - 8 - 1, shimo - meguro, meguro - ku, tokyo 153 - 0064 japan 0120 191014 or +81 3 5437 9125 support.japan@freescale.com asia/pacific: freescale semiconductor hong kong ltd. technical information center 2 dai king street tai po industrial estate tai po, n.t., hong kong +800 2666 8080 support.asia@freescale.com for literature requests only: freescale semiconductor literature distribution center p.o. box 5405 denver, colorado 80217 1 - 800- 441- 2447 or 303 - 675- 2140 fax: 303 - 675- 2150 ldcforfreescalesemiconductor@hibbertgroup.com document number: mrf5s9100 rev. 3, 7/2005

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